The present invention relates generally to a phase change memory device, and more particularly to a nonvolatile memory device utilizing phase change resistors and reference cells with improved stability of a reference current and an improved offset characteristic of a sense amplifier.
A nonvolatile memory device is capable of conserving data even when the power of a device is turned off. Examples of nonvolatile memory include a magnetic memory and a phase change memory (PCM). These examples have a data processing speed similar to that of a volatile Random Access Memory (RAM) and can conserve data even after the power is turned off.
FIGS. 1a and 1b are diagrams illustrating a conventional phase change resistor (PCR) 4.
The PCR 4 comprises a phase change material (PCM) 2 interposed between a top electrode 1 and a bottom electrode 3. When a voltage and a current are transmitted through the device, a high temperature is generated in the PCM 2 so that an electric conductive state is changed depending on a change in resistance occurring due to the applied high temperature. The PCM 2 includes AgLnSbTe. The PCM 2 includes a chalcogenide having chalcogen elements (S, Se, Te) as a main ingredient, and more specifically the PCM 2 includes a germanium antimonic tellurium consisting of Ge—Sb—Te.
FIGS. 2a and 2b are diagrams illustrating the operating principles of the conventional PCR 4.
As shown in FIG. 2a, the PCM 2 can be crystallized when a low current of less than a threshold value flows in the PCR 4. The crystallized PCM2 has a low resistance.
As shown in FIG. 2b, the PCM 2 becomes amorphous when a high current of more than a threshold value flows in the PCR 4, since at this time the temperature applied to the PCM 2 is greater than its melting point. The amorphous PCM 2 has a high resistance.
Using this phenomenon, the PCR 4 can be configured to store nonvolatile data corresponding to the two different resistance states. For example, data logic value “1” corresponds to the crystallized PCR 4 (low resistance state), and data logic value “0” corresponds to the amorphous PCR 4 (high resistance state), and accordingly the logic states of the data can be stored using the PCR 4.
FIG. 3 is a diagram illustrating the write operation of a conventional phase change resistance cell.
Heat is generated when current flows between the top electrode 1 and the bottom electrode 3 of the PCR 4 for a given amount of time. As a result, the state of the PCM 2 changes to a crystalline state or an amorphous state depending on the temperature resulting from the current flowing between the top electrode 1 and the bottom electrode 3.
For example, when a low current flows for a given time, the PCM 2 becomes crystalline due to a low temperature heating state, and thus the PCR 4 is at a low resistance state (set state). Conversely, when a high current flows for a given time, the PCM 2 becomes amorphous due to a high temperature heating state, and thus the PCR 4 is at a high resistance state (reset state). The difference between the two phases is determined based on the change in electric resistance.
In the PCR 4, the low voltage required for changing the phase change material to a crystalline state must be applied to the PCR 4 for a long period of time in order to write the set state in a write mode. Conversely, the high voltage required for changed the PCM 2 to an amorphous state need only be applied to the PCR 4 for a short time in order to write the reset state in the write mode.
However, phase change memory devices are not without problems. When the reference voltage of a phase change memory device having a phase change resistor is not effectively controlled the sensing efficiency of a sense amplifier is degraded. As such, the reference current is unstable and the accuracy and the offset characteristic of the sense amplifier are degraded causing deterioration in the data sensing margin and yield of a chip.